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march 2002 1 MIC2590A MIC2590A micrel MIC2590A dual-slot pci hot-plug controller final information general description the MIC2590A is a power controller supporting power distri- bution requirements for peripheral component interconnect (pci) hot-plug compliant systems incorporating the intelli- gent platform management interface (ipmi). the MIC2590A provides complete power control support for two pci slots including the 3.3v aux defined by the pci 2.2 specification. support for +5v, +3.3v, +12v and ?2v supplies is provided including programmable constant-current inrush limiting, voltage supervision, programmable current-limit, fault report- ing and circuit breaker functions which provide fault isolation. the MIC2590A also incorporates a smbus interface in which complete status and control of power within each slot is provided. data such as voltage and current from each supply of each slot can be obtained for ipmi sensor records in addition to power status of each slot. features supports two independent pci 2.2 slots smbus interface for slot power control and status +5v, +3.3v, +12v, ?2v, +3.3v aux supplies supported per pci specification 2.2 programmable inrush current-limiting active current regulation controls inrush current electronic circuit breaker dual level fault detection for quick fault response without nuisance tripping thermal isolation between circuitry for slot a and slot b applications pci hot-plug power distribution micrel, inc. ?1849 fortune drive ?san jose, ca 95131 ?usa ?tel + 1 (408) 944-0800 ?fax + 1 (408) 944-0970 ?http://www.mic rel.com ordering information 5v & 3v fast-trip +12v & ?2v fast-trip part number threshold threshold operating temp. range package MIC2590A-2btq 100mv 1.5a/0.4a 0 c to +70 c 48-pin tqfp MIC2590A-3btq 150mv* 1.5a/0.4a 0 c to +70 c 48-pin tqfp MIC2590A-4btq 200mv* 1.5a/0.4a 0 c to +70 c 48-pin tqfp MIC2590A-5btq disabled* 1.5a/0.4a 0 c to +70 c 48-pin tqfp *contact factory for availability.
MIC2590A micrel MIC2590A 2 march 2002 typical application vauxa 5vina 12vin1 12vin2 12mvin1 12mvin2 5vsena 5vgatea 5vouta vstby1 vstby2 12slewa 12slewb cfiltera 3.3vauxa pci bus 5v, 5a 3vina 3vsena 3vgatea 3vouta 12vouta 12mvouta 5vinb 3.3v, 7.6a 12v, 0.5a 12v, 0.1a 5vsenb 5vgateb 5voutb 3vinb 3vsenb 3vgateb 3voutb 12voutb 12mvoutb vauxb 5v, 5a 3.3v, 7.6a 12v, 0.5a 12v, 0.1a 3.3vauxb r sense c gate r 5vgatea r 3vgatea r 5vgateb r 3vgateb c gate r sense r sense c gate c gate r sense pci bus 4.7 f 4.7 f 4.7 f 4.7 f mic2590 iref cfilterb gnd ona/onb auxena/auxenb /faulta, /faultb a0 a1 a2 /int scl sda pci connector sda scl /int sda scl /int management controller bus switch /oe hot-plug controller ona/onb auxena/auxenb /faulta, /faultb smbus i/o ab 2 2 2 20k 1% power supply +12v 12v +5.0v +3.3v vstby 1a schotty diode (clamp)
march 2002 3 MIC2590A MIC2590A micrel pin configuration 13 12vmin 3vouta vauxa 3vgatea 3vsensea 12vmin 12mvouta 12mvoutb 14 15 16 17 18 19 20 1 2 3 4 5 6 7 8 9 10 11 12 /faulta cfiltera 12vslewa gpia 12vin 5vina 5vsensea 5vgatea 5vouta 12vouta vstby 3vina 3vsenseb 3vgateb vauxb 3voutb 21 22 23 24 36 35 34 33 32 31 30 29 28 27 26 25 /faultb cfilterb 12vslewb iref 12vin 5vinb 5vsenseb 5vgateb 5voutb 12voutb vstby 3vinb 48 47 46 45 44 43 42 41 40 39 38 37 ona auxena gnd scl sda onb auxenb a0 /int gpib a2 a1 48-pin tqfp (btq)
MIC2590A micrel MIC2590A 4 march 2002 pin description pin number pin name pin function 6, 31 5vina, 5vinb 5v supply power and sense inputs [a/b]: two pins are provided for kelvin connection (one for each slot). pin 6 is the kelvin-sense connection to the supply side of the sense resistor for 5v slot a. pin 31 is the kelvin-sense connection to the supply side of the sense resistor for 5v slot b. these two pins must ultimately connect to each other within 10cm. an undervoltage lockout circuit (uvlo) prevents the switches from turning on while this input is less than its lockout threshold. 12, 25 3vina, 3vinb 3.3v supply power and sense inputs [a/b]: two pins are provided for kelvin connection (one for each slot). pin 12 is the kelvin-sense connection to the supply side of the sense resistor for 3v slot a. pin 25 is the kelvin-sense connection to the supply side of the sense resistor for 3v slot b. these two pins must ultimately connect to each other within 10cm. an undervoltage lockout circuit (uvlo) prevents the switches from turning on while this input is less than its lockout threshold. 5, 32 12vin 2 pins +12v supply input: an undervoltage lockout circuit prevents the switches from turning on while this input is less than its lockout threshold. both pins must be tied together at the chip. 17,18 12vmin 2 pins 12v supply input: an undervoltage lockout circuit prevents the switches from turning on while this input is less than its lockout threshold. both pins must be tied together at the chip. 10, 27 12vouta, 12voutb 12v output [a/b] 19, 20 12mvouta, 12mvoutb 12v output [a/b] 3, 34 12vslewa, 12vslewb 12v slew rate control [a/b]: connect capacitors between these pins and ground to set output slew rates of the +12v and -12v supplies. 45, 42 auxena, auxenb aux enable inputs [a/b]: rising-edge sensitive enable inputs for vauxa and vauxb outputs. taking auxena/auxenb low after a fault resets the respective slot s aux output fault latch. tie these pins to ground if using smbus-mode power control. 16, 21 3vouta, 3voutb 3.3v power-good sense inputs: connect to 3.3v[a/b] outputs. used to monitor the 3.3v output voltages for power-good status. 9, 28 5vouta, 5voutb 5v power-good sense inputs: connect to 5v[a/b] outputs. used to monitor the 5v output voltages for power-good status. 33 iref a resistor connected between this pin and ground sets the adc current measurement gain. this resistor must be 20k ? 1%. 7, 30 5vsensea, 5vsenseb 5v circuit breaker sense input [a/b]: the current-limit thresholds are set by connecting sense resistors between these pins and 5vin[a/b]. when the current-limit threshold of ir = 50mv is reached, the 5vgate[a/b] pin is modulated to maintain a constant voltage across the sense resistor and therefore a constant current into the load. if the 50mv threshold is exceeded for t flt , the circuit breaker is tripped and the gate pin for the affected slot is immediately pulled low. 13, 24 3vsensea, 3vsenseb 3v circuit breaker sense input [a/b]: the current-limit thresholds are set by connecting sense resistors between these pins and 3vin[a/b]. when the current-limit threshold of ir = 50mv is reached, the 3vgate[a/b] pin is modulated to maintain a constant voltage across the sense resistor and therefore a constant current into the load. if the 50mv threshold is exceeded for t flt , the circuit breaker is tripped and the gate pin for the affected slot is immediately pulled low.
march 2002 5 MIC2590A MIC2590A micrel pin description pin number pin name pin function 8, 29 5vgatea, 5vgateb 5v gate drive outputs [a/b]: each connects to the gate of an external n- channel mosfet. during power-up the c gate and the gate of the mosfets are charged by a 20 a current source. this controls the value of dv/dt seen at the source of the mosfets, and hence the current flowing into the load capacitance. during current-limit events, the voltage at this pin is adjusted to maintain constant current through the switch for a period of t flt . whenever an overcurrent, thermal shutdown or input undervoltage fault condition occurs the gate pin for the affected slot is immediately brought low. during power-down these pins are discharged by an internal current source. 14, 23 3vgatea, 3vgateb 3v gate drive outputs [a/b]: each connects to the gate of an external n- channel mosfet. during power-up the c gate and the gate of the mosfets are charged by a 20 a current source. this controls the value of dv/dt seen at the source of the mosfets, and hence the current flowing into the load capacitance. during current-limit events, the voltage at this pin is adjusted to maintain constant current through the switch for a period of t flt . whenever an overcurrent, thermal shutdown or input undervoltage fault condition occurs the gate pin for the affected slot is immediately brought low. during power-down these pins are discharged by an internal current source. 11, 26 vstby 2 pins 3.3v standby input voltage required to support pci 2.2 vaux input: smbus, internal registers and a/d converter run off of vstby to ensure chip access during standby modes. a uvlo circuit prevents turn-on of this supply until vstby rises above its uvlo threshold. both pins must be tied together at the chip. 15, 22 vauxa, vauxb v aux [a/b] output voltages to pci card slots: these outputs connect the vaux pin of the pci 2.2 connectors to vstby via internal 400m ? mosfets which are current-limited and protected against short-circuit faults. 44, 43 ona, onb enable input for main outputs: rising-edge sensitive. used to enable or disable main (5v, 3.3v, +12v, 12v) outputs. taking ona/onb low after a fault resets the respective slot s main output fault latch. tie these pins to ground if using smbus-mode power control. 1, 36 /faulta, /faultb open drain, active-low: asserted whenever the circuit breaker trips due to a fault condition. /fault[a/b] is reset by bringing the faulted slot s on pin low if /fault was asserted in response to a fault condition on one of the slot s main outputs (+12v, +5v, +3.3v, or 12v). /fault[a/b] is reset by bringing the faulted slot s auxen pin low if /fault was asserted in response to a fault condition on the slot s vaux output. if a fault condition occurred on both the main and aux outputs of the same slot, then both on and auxen must be brought low to de-assert the /fault output. 2, 35 cfiltera, cfilterb filter capacitor [a/b]: capacitors connected between these pins and ground set the duration of t flt . t flt is the amount of time for which a slot remains in current-limit before its circuit breaker is tripped. 37 /int interrupt output: open drain, active-low. asserted whenever a power fault is detected. cleared by writing a logic 1 to the respective active bit into the status register.
MIC2590A micrel MIC2590A 6 march 2002 pin description pin number pin name pin function 48 sda smbus data: bidirectional smbus data line. 47 scl smbus clock: input. 39, 40, 41 a2, a1, a0 smbus address select pins: connect to ground or leave open in order to program device smbus base address. there is an internal pull-up to vstby on each of these inputs. 4, 38 gpia, gpib general purpose inputs: the state of these inputs are available by reading the common status register. 46 gnd ground.
march 2002 7 MIC2590A MIC2590A micrel absolute maximum ratings (note 1) supply voltage (12v in ) ..................................................................... +14v (12mv in ) .................................................................. 14v (5v in ) ......................................................................... +7v (3v in ), (v stby ) .......................................................... +7v any logic output voltage ............ 0.5 (min.)/+5.5v (max.) any logic input voltage ............... 0.5 (min.)/+5.5v (max.) output current fault[a/b]#, (/int, sda) ................. 10ma lead temperature ir reflow, peak temperature ..................... 235 +5/ 0 c storage temperature (t s ) ....................... 65 c to +150 c esd rating, note 3 ................................................... 1.5kv operating ratings (note 2) supply voltage (12v in ) ............................................... +11.65v to +12.6v (12mv in ) .............................................. 11.0v to 13.2v (5v in ) ................................................... +4.85v to +5.25v (3v in ) ....................................................... +3.1v to +3.6v (v stby ) .................................................. +3.15v to +3.6v ambient temperature (t a ) ............................. 0 c to +70 c junction temperature (t j ) ........................................ 125 c package thermal resistance tqfp ( ja ) ....................................................... 56.5 c/w electrical characteristics 12v in = 12v; 12mv in = 12v; 5v in = 5v; 3v in = 3.3v; v stby = 3.3v; t a = 0 c to 70 c; unless noted. power control and logic sections symbol parameter condition min typ max units i cc12 supply current 0.6 2.0 ma i cc5 1.2 2.0 ma i cc33 0.5 0.7 ma i cc12m 1.0 2.0 ma i ccvsby 2.5 5.0 ma v uvlo under-voltage lockout 12v in increasing 8 9 10 v 3v in increasing 2.2 2.5 2.75 v 5v in increasing 3.7 4.0 4.3 v 12mv in decreasing 10 9 8v v stby increasing 2.8 2.9 3.0 v v hysuv under-voltage lockout hysteresis - 180 mv 12v in , 12mv in , 5v in , 3v in v hysstby under-voltage lockout hysteresis - 50 mv v stby v uvth power good under-voltage thresholds v uvth(12v) 12v out [a/b] 12v out [a/b] decreasing 10.2 10.5 10.8 v v uvth(12mv) 12mv out [a/b] 12mv out [a/b] increasing 10.8 10.6 10.2 v v uvth(3v) 3v out [a/b] 3v out [a/b] decreasing 2.7 2.8 2.9 v v uvth(5v) 5v out [a/b] 5v out [a/b] decreasing 4.4 4.5 4.7 v v uvth(vaux) v aux [a/b] v aux [a/b] decreasing 2.7 2.8 2.9 v v hyspg power-good detect hysteresis 30 mv v gate 5v gate /3v gate voltage 12v in -1.5 12v in v i gate(source) 5v gate /3v gate output source start sycle 15 25 35 a current i gate(sink) 5v gate /3v gate output sink any fault condition, v gate = 5v 70 ma fault current v filter c filter threshold voltage 1.20 1.25 1.30 v i filter c filter [a/b] charge current v [5/3] v in v [5/3] v sense > v thilimit 1.80 2.5 5.0 a i slew 12v slew [a/b] charge current during turn-on only 13 22 35 a v thilimit current limit threshold voltages 5v[a/b] supplies v 5vin v 5vsense 35 50 65 mv 3.3v[a/b] supplies v 3vin v 3vsense 35 50 65 mv v thfast 5v out [a/b] and 3v out [a/b] MIC2590A-2 90 113 135 mv fast-trip thresholds MIC2590A-3 150 mv MIC2590A-4 200 mv MIC2590A-5 disabled
MIC2590A micrel MIC2590A 8 march 2002 symbol parameter condition min typ max units v il low-level input voltage 0.8 v (scl, sda, on[a/b], a[0-2],gpi[a/b]) v ol output low voltage i ol = 3ma 0.4 v /fault[a/b], /int, sda v ih high-level input voltage 2.1 v scl, sda, on[a/b], a[0-2], auxen[a/b], gpi[a/b]) r pull-up internal pullups from a[0-2] to v stby 40 k ? i il input leakage current 5 a scl, on[a/b], auxen[a/b], gp[a/b]) i lkg(off) off-state leakage current 5 a sda, /fault[a/b], /int t ov overtemperature shutdown & reset t j increasing, each slot, note 5 140 c thresholds, with overcurrent on slot t j decreasing, each slot, note 5 130 c overtemperature shutdown & reset t j increasing, both slots, note 5 160 c thresholds, all other conditions t j decreasing, both slots, note 5 150 c (all outputs will latch off) r out(on) output mosfet resistance r ds(12v) 12v mosfet i ds = 500ma, t j = 125 c500m ? r ds(12vm) 12v mosfet i ds = 100ma, t j = 125 c2 ? r ds(aux) v aux mosfet i ds = 375ma, t j = 125 c400m ? v off off-state output offset voltage v off(+12v) 12v out [a/b] 12v out [a/b] = off, t j = 125 c50mv v off( 12v) 12mv out [a/b] 12mv out [a/b] = off, t j = 125 c 50 mv v off(vaux) v aux [a/b] v aux [a/b] = off, t j = 125 c50mv i thslow current limit threshold i lim(12) 12v mosfet 12v out [a/b] = 0v 0.52 1.0 1.5 a i lim(12m) 12v mosfet 12mv out [a/b] = 0v 0.11 0.2 0.3 a i thfast fast-trip thresholds 12v out [a/b] (MIC2590A-2) 1.0 2.15 3.0 a 12mv out [a/b] (MIC2590A-2) 0.20 0.45 0.6 a i aux(thresh) auxiliary output current limit threshold current which must be drawn 0.84 a figure 4 from v aux to register as a fault i sc(tran) maximum transient short circuit current v aux enabled, then grounded i max = v stby / r ds(aux) a i lim(aux) regulated current after transient from end of i sc(tran) to c filter time-out 0.375 0.7 1.35 a r disch output discharge resistance r (12v) 12v out [a/b] 12v out [a/b] = 6.0v 1600 ? r (12mv) 12mv out [a/b] 12mv out [a/b] = 6.0v 600 ? r (3v) 3v out [a/b] 3v out [a/b] = 1.65v 150 ? r (5v) 5v out [a/b] 5v out [a/b] = 2.5v 150 ? r (3vaux) 3v aux [a/b] 5v out [a/b] = 1.65v 430 ? t off(3) current limit response time MIC2590A-2 with c gate = 10nf, 1 s t off(5) for 3.3v and 5v outputs, figure 2 v in v sense = 200mv t sc(tran) v aux current limiter response time v aux [a/b] = 0v, note 5 33 s figure 5 t off(12) 12v current limit response 12v out [a/b] = 0v, note 5 1 s figure 3 t off(12m) 12v current limit response 12mv out [a/b] = 0v, note 5 1 s figure 3
march 2002 9 MIC2590A MIC2590A micrel symbol parameter condition min typ max units t prop(3vfault) delay from 3v[a/b] overcurrent-limit MIC2590A-2, v sense v thlimit =1 s to fault output 200mv, c filter = open t prop(5vfault) delay from 5v[a/b] overcurrent-limit MIC2590A-2, v sense v thlimit =1 s to fault output 200mv, c filter = open t w on[a/b], auxen[a/b] pulse width note 5 100 ns t por MIC2590A power-on reset time note 5 500 s after v stby becomes valid 8-bit analog to digital converter symbol parameter condition min typ max units total unadjusted error voltage, all outputs 3+3% current, 3v out [a/b]/5v out [a/b] measured as voltage across 3+3% current, v aux [a/b], 12v out [a/b], corresponding external r sense 3% 12mv out [a/b] t conv conversion time 60 100 ms resolution specifications: v auxa full scale voltage 3.85 v v auxb lsb of voltage 15.1 mv full scale current 375 ma lsb of current 1.47 ma 3v outa full scale voltage 3.85 v 3v outb lsb of voltage 15.1 mv full scale current external r sense = 6.00m ? 11.6 a lsb of current 45.5 ma 5v outa full scale voltage 5.89 v 5v outb lsb of voltage 23.1 mv full scale current external r sense = 10.0m ? 6.96 a lsb of current 27.3 ma 12v outa full scale voltage 13.8 v 12v outb lsb of voltage 54.1 mv full scale current 500 ma lsb of current 1.96 ma 12mv outa full scale voltage 13.6 v 12mv outb lsb of voltage 53.5 mv full scale current 100 ma lsb of current 0.392 ma smbus timing, note 5 symbol parameter condition min typ max units t 1 scl (clock) period figure 1 2.5 s t 2 data in set-up time to scl high figure 1 100 ns t 3 data out stable after scl low figure 1 300 ns t 4 data low set-up time to start condition, figure 1 100 ns scl low t 5 data high hold time after stop condition, figure 1 100 ns scl high note 1. exceeding the absolute maximum rating may damage the device. note 2. the device is not guaranteed to function outside its operating ratings. note 3. devices are esd sensitive. employ proper handling precautions. human body model, 1.5k ? in series with 100pf. note 4. see the applications section. note 5. parameters guaranteed by design. not 100% production tested.
MIC2590A micrel MIC2590A 10 march 2002 timing diagrams t 1 scl sda data in sda data out t 4 t 2 t 3 t 5 figure 1. smbus timing 3vgate/5vgate 1v t off35 v thfast v thfast figure 2. 3v/5v current limit response timing t off12[m] i lim12[m] i out i thfast figure 3. +12v/ 12v current limit response timing must trip may not trip i out(aux) i out(aux) i aux(thresh) i lim(aux) figure 4. vaux current limit threshold t sc(tran) i sc(tran) i limaux i out(aux) figure 5. vaux current limit response timing
march 2002 11 MIC2590A MIC2590A micrel functional description hot swap insertion when circuit boards are inserted into systems carrying live supply voltages ( hot-plugged ), high inrush currents often result due to the charging of bulk capacitance that resides across the circuit board s supply pins. this transient inrush current can cause the system s supply voltages to tempo- rarily go out of regulation, causing data loss or system lock- up. in more extreme cases, the transients occurring during a hot-plug event may cause permanent damage to connectors or on-board components. the MIC2590A addresses these issues by limiting the inrush currents to the load (pci board), and thereby controlling the rate at which the load s circuits turn on. in addition, the MIC2590A offers input and output voltage supervisory func- tions and current-limiting to provide robust protection for both the host system and the pci board. system interfaces the MIC2590A employs two system interfaces. one is the hot-plug interface (hpi) which includes on[a/b], auxen[a/ b], and /fault[a/b]. the other is the system management interface (smi) consisting of sda, scl and /int, (whose signals conform to the specifications and format of intel s smbus standard). the MIC2590A can be operated exclu- sively from the smi, or can employ the hpi for power control while continuing to use the smi for access to all but the power control registers. in addition to the basic power control features of the MIC2590A accessible by the hpi, the smi also gives the host access to the following information from the part: 1. output voltage from each supply. 2. output current from each supply. 3. fault conditions occurring on each supply. when using the system management interface for power control, do not use the hot-plug interface. conversely, when using the hpi for power control, do not execute power control commands over the smi bus (all other register accesses via the smi bus remain permissible while in the hpi control mode). power-on reset and power cycling the MIC2590A utilizes vstby as the main supply input source. it is required for proper operation of the MIC2590A smbus, registers and adc and must be applied at all times. a power-on reset (por) cycle is initiated after vstby rises above its uvlo threshold and remains valid at that voltage for 500 s. all internal registers except result are cleared after por. if vstby is recycled the MIC2590A enters a new power-on reset cycle. vstby must be the first supply input applied. following the por interval, the main supply inputs of 12vin, 12mvin, 5vin and 3vin may be applied in any order. the smbus is ready for access at the end of the por interval. during t por all outputs are off. power-up cycle (see typical application circuit) when a slot is off the 5vgate and 3vgate pins are held low with an internal pull-down current source. when a slot s main outputs are enabled, and all input voltages are above their respective undervoltage lockout thresholds, all four main supplies execute a controlled turn on. at this time, the gate voltages of the 5v and 3.3v mosfets are ramped at a controlled rate from 0v to approximately 11.5v. this is sufficient to fully enhance the external mosfets for lowest possible dc losses. the ramp rate is controlled by 25 a(typ) current sources from the gate pins charging each c gate . the magnitude and slew rate of the output current is propor- tional to the value of c gate and the load capacitance. the minimum value of c gate is selected to ensure that during start-up the load current does not exceed the current-limit threshold. the following equation is used to determine the value of c gate (min): c (min) i i c gate gate lim load = where c load is the load capacitance connected to the 3.3v and 5v outputs and i lim and i gate are respectively the current-limit and gate charge current specifications as given in the electrical characteristics table. the output slew rate dv/dt is computed by: dv / dt (load) i c10 gate gate 6 = i slew = 25 a c gate dv/dt (load) 0.001 f 25000v/s 0.01 f 2500v/s 0.1 f 250v/s 1 f 25v/s table 1. 3.3v/5v output slew-rate selection for the +12v and 12v supplies the output slew rate is controlled by capacitors connected to the 12vslewa and 12vslewb pins. to determine the minimum value of the slew rate capacitor, (c slew ), connected to 12vslew[a/b], the following equation is used: c (min) i i c slew slew lim load = where c load is the load capacitance connected to the +12v and 12v outputs, and i lim and i slew are respectively the current-limit and slew rate charge current values found in the electrical characteristics table. the equation above com- putes the minimum value to guarantee the device does not enter into current-limit. the slew rate dv/dt is computed by: dv / dt at load i c10 slew slew 6 = by appropriate selection of the value of c slew , it can be ensured that the magnitude of the inrush current never exceeds the current-limit for a given load capacitance. since one capacitor fixes the slew rate for both +12v and 12v, the capacitor value should be chosen to provide the slower slew rate of the two. table 2 depicts the output slew rate for various values of c slew .
MIC2590A micrel MIC2590A 12 march 2002 i slew = 22 a c gate dv/dt (load) 0.001 f 22000v/s 0.01 f 2200v/s 0.1 f 220v/s 1 f 22v/s table 2. 12v output slew-rate selection power-down cycle when a slot is turned off, internal switches are connected to each of the outputs to discharge the pci board's bypass capacitors to ground. standby mode standby mode is entered when any one (or more) enabled main supply input(s) (12vin, 12mvin, 5vin and 3vin) drops below its respective uvlo threshold. the MIC2590A sup- plies two 3.3v auxiliary outputs, vaux[a/b], satisfying pci 2.2 specifications. these outputs are fed via the vstby input, and controlled by the auxen[a/b] inputs or via their smi bus control registers. these outputs are independent of the main outputs: should one or more of the main supply inputs move below its uvlo thresholds, vaux[a/b] still function as long as vstby is present. prior to entering standby mode, ona and onb (or the maina and mainb bits in the control registers) inputs should be de-asserted. if this is not done, the MIC2590A will assert /fault, and also /int if interrupts are enabled, when the MIC2590A detects an undervoltage condition on a supply input. circuit breaker functions the MIC2590A provides an electronic circuit breaker function that protects against excessive loads such as short circuits at each supply. when the current from one or more of a slot s main outputs exceeds the current-limit threshold (50mv/r sense for 3.3v and 5v, 1.0a for +12v, and/or 0.2a for 12v) for a duration greater than t flt , the circuit breaker is tripped and all main supplies (all outputs except vaux[a/b]) are shut off. should the load current exceed i thfast (+12v and 12v), or cause a main output s v sense to exceed v thfast (+3.3v and +5v), the outputs are shut off with no delay. undervoltage conditions on the main supply inputs also trip the circuit breaker, but only when the main outputs are enabled (to signal a supply input brown-out condition). the vaux[a/b] outputs have their own separate circuit breaker functions. vaux[a/b] do not incorporate a fast-trip threshold, but instead regulate the output current into a fault to avoid exceeding their operating current-limit. the circuit breaker will trip due to overcurrents on vaux[a/b] when the fault timer expires. this use of the t flt timer prevents the circuit breaker from tripping prematurely due to brief current transients. following a fault condition, the outputs can be turned on again via the on inputs (if the fault occurred on one of the main outputs), via the auxen inputs (if the fault occurred on the aux outputs), or by cycling both on and auxen (if faults occurred on both the main and aux outputs). a fault condi- tion can alternatively be cleared under smi control of the enable bits in the cntrl[a/b] registers. when the circuit breaker trips, /fault[a/b] will be asserted if the outputs were enabled through the hot-plug interface (non-smi mode) inputs. at the same time, /int will be asserted (unless interrupts are masked). note that /int is de-asserted by writing a logic 1 back into the respective fault bit position(s) in the stat[a/b] register or the common status register. t flt is set by external capacitors, c fil[a/b] , connected to the cfilter[a/b] pins. the equation below can be used to determine the capacitor value for a given duration of t flt : c 2.0 f t 1second fil flt ? ? ? ? ? ? ? thermal shutdown the internal +12v, 12v and vaux mosfets are protected against damage not only by current-limiting, but by dual- mode over-temperature protection as well. each slot control- ler on the MIC2590A is thermally isolated from the other. should an overcurrent condition raise the junction tempera- ture of one slot s controller and internal pass elements to 140 c, all of the outputs for that slot (including vaux) will be shut off, and the slot s /fault output will be asserted. the other slot s operation will remain unaffected. however, should the MIC2590A s overall die temperature exceed 160 c, both slots (all outputs, including vauxa and vauxb) will be shut off, whether or not a current-limit condition exists. a 160 c overtemperature condition additionally sets the overtemperature bit (ot_int) in the common status regis- ter. a/d converter the MIC2590A has a 20-channel, 8-bit a/d converter ca- pable of monitoring the output voltage and current of each supply. this information is available via the system manage- ment interface. the information is particularly intended for use by systems that support the ipmi standard, but may be used for any desired purpose.
march 2002 13 MIC2590A MIC2590A micrel system management interface (smi) the MIC2590A s system management interface uses the read_byte and write_byte subset of the smbus protocols to communicate with its host via the system management interface bus. additionally, the /int output signals the con- trolling processor that one or more events need attention, if an interrupt-driven architecture is used. note that the MIC2590A does not participate in the smbus alert response address (ara) portion of the smbus protocol. the smbus read_byte operation consists of sending the device s slave address, followed by the target register s internal address, and then clocking out the byte to be read from the target register. similarly, the write_byte operation consists of sending the device s slave address, followed by the target register s internal address, and then clocking in the byte to be written to the target register. the target register addresses for the MIC2590A are given in table 4. interrupt generation in the MIC2590A the /int pin can be asserted (driven low) whenever a fault condition trips the circuit breaker. the MIC2590A can thus operate in either polled mode or interrupt mode. in the polled mode the interrupt mask bit in the common status register should be set, to prevent the /int pin from being asserted. upon a circuit breaker fault event the appropriate status bit is also set in the corresponding status auxen[x] on[x] aux out[x] main out[x] fault detected on aux out[x] fault detected on main out[x] /fault output[x] /int output (cleared by software) figure 6. hot-plug interface mode operation registers. in order to clear the status bit the system must write a logic 1 back to same bit in the status register. upon occurrence of the write the /int pin will be de-asserted (if interrupts were enabled), if no other interrupts are pending. this method of echo reset allows data to be retained in the status registers until such time as the system software is ready to deal with that data, and then to control the earliest time at which the next interrupt might occur. MIC2590A smbus address configuration the MIC2590A responds to its own unique address which is assigned using a2, a1 and a0. these represent the 3 lsbs of its 7-bit address, as shown in table 3. these address bits are assigned only during power up of the vstby supply input. these three bits allow up to eight MIC2590A devices in a single system. these pins are either grounded or left unconnected to specify a logical 0 or 1 respectively. a pin designated as a logical 1 may also be pulled up to vstby. inputs MIC2590A slave address a2 a1 a0 binary hex 0 0 0 1000 000 b 80 h 0 0 1 1000 001 b 82 h 0 1 0 1000 010 b 84 h 0 1 1 1000 011 b 86 h 1 0 0 1000 100 b 88 h 1 0 1 1000 101 b 8a h 1 1 0 1000 100 b 8c h 1 1 1 1000 111 b 8e h table 3. MIC2590A smbus addressing
MIC2590A micrel MIC2590A 14 march 2002 s1000 a2 a1 a0 x x x 1a x 00000 xxxax x x /a xx p MIC2590A slave address master to slave transfer, i.e., data driven by master. x slave to master transfer, i.e., data driven by slave. data clk target register value read from MIC2590A start stop r/w = read acknowledge not acknowledge figure 7. read_byte protocol s1000 a2 a1 a0 x x x 0a x 00000 xxxaxx x /a xx p MIC2590A slave address master to slave transfer, i.e., data driven by master. x slave to master transfer, i.e., data driven by slave. data clk target register value to be written to MIC2590A start stop r/w = write acknowledge not acknowledge figure 8. write_byte protocol register set and programmer s model command power-on target register byte value default label description read write result adc conversion result register 00 h n/a n/a adcntrl adc control regster 01 h 01 h 00 h cntrla control register slot a 02 h 02 h 00 h cntrlb control register slot b 03 h 03 h 00 h stata slot a status 04 h 04 h 00 h statb slot b status 05 h 05 h 00 h stat common status register 06 h 06 h 00 h table 4. MIC2590A register addresses
march 2002 15 MIC2590A MIC2590A micrel control register, slot a (cntrla), 8-bits read/write d[7] d[6] d[5] d[4] d[3] d[2] d[1] d[0] read-only read-only read-only read-only read-only read-only read-write read-write auxapg mainapg reserved reserved reserved reserved maina vauxa bit(s) function operation auxapg aux output power-good 1 = power-good status, slot a (vauxa output is above its v uvth threshold) mainapg main output power-good 1 = power-good status, slot a (maina outputs are above their v uvth thresholds) d[5] reserved always read as zero d[4] reserved always read as zero d[3] reserved always read as zero d[2] reserved always read as zero maina main enable control, 0 = off, 1 = on slot a vauxa vaux enable control, 0 = off, 1 = on slot a power-up default value: 0000 0000 b = 00 h command byte (r/w): 0000 0010 b = 02 h the power-up default value is 00h. slot a is disabled upon power-up, i.e., all supply outputs are off. control register, slot b (cntrlb), 8-bits read/write d[7] d[6] d[5] d[4] d[3] d[2] d[1] d[0] read-only read-only read-only read-only read-only read-only read-write read-write auxbpg mainbpg reserved reserved reserved reserved mainb vauxb bit(s) function operation auxbpg aux output power-good 1 = power-good status, slot b (vauxb output is above its v uvth threshold) mainbpg main output power-good 1 = power-good status, slot b (mainb outputs are above their v uvth thresholds) d[5] reserved always read as zero d[4] reserved always read as zero d[3] reserved always read as zero d[2] reserved always read as zero mainb main enable control, 0 = off, 1 = on slot b vauxb vaux enable control, 0 = off, 1 = on slot b power-up default value: 0000 0000 b = 00 h command byte (r/w): 0000 0011 b = 03 h the power-up default value is 00h. slot b is disabled upon power-up, i.e., all supply outputs are off. detailed register descriptions below: conversion result register (result), 8-bits read only d[7] d[6] d[5] d[4] d[3] d[2] d[1] d[0] read-only read-only read-only read-only read-only read-only read-only read-only voltage or current data from adc bit function operation d[7:0] measured data from adc read only power-up default value: undefined following por read command byte: 0000 0000 b = 00 h (adc control register (adcntrl), 8-bits read/write d[7] d[6] d[5] d[4] d[3] d[2] d[1] d[0] read-only read-only read-only read-write read-write read-write read-write read-write busy reserved reserved sel par supply select sup[2:0] bit(s) function operation busy adc status 0 = adc quiescent, 1 = adc busy d[6] reserved always read as zero d[5] reserved always read as zero sel a/d slot select specifies channel for a/d conversion 0 = slot a, 1 = slot b par parameter control bit for 1 = voltage, adc conversion 0 = current sup[2:0] supply select for 000 = no conversion adc conversion 001 = 3.3v suppy 010 = 5.0v supply 011 = +12v supply 100 = 12v supply 101 = vaux supply power-up default value: 0000 0000 b = 00 h command byte (r/w): 0000 0001 b = 01 h to operate the adc the adcntrl register must first be initialized by selecting a slot, specifying whether voltage or current is to be measured and then specifying the specific supply that is to be monitored. the software must then wait 100ms, or poll the busy bit until it is zero. the result register will then contain the valid result of the conversion.
MIC2590A micrel MIC2590A 16 march 2002 status register, slot a (stata), 8-bits read only d[7] d[6] d[5] d[4] d[3] d[2] d[1] d[0] read-only read-only read-only read-write read-write read-write read-write read-write faulta maina vauxa vauxaf 12mvaf 12vaf 5vaf 3vaf bit(s) function operation faulta fault pin status, notes 1 & 2 slot a maina main enable status, represents actual state slot a (on/off) of the four main power outputs for slot a (+12v, +5v, +3.3v and 12v) 1 = main power on 0 = main power off vauxa vaux enable status represents actual state slot a (on/off) of the auxiliary power outputs for slot a 1 = aux power on 0 = aux power off vauxfa overcurrent fault 1 = fault; 0 = no fault vaux supply 12mvfa overcurrent fault 1 = fault; 0 = no fault 12v supply 12vfa overcurrent fault 1 = fault; 0 = no fault +12v supply 5vfa overcurrent fault 1 = fault; 0 = no fault 5v supply 3vfa overcurrent fault 1 = fault; 0 = no fault 3.3v supply power-up default value: 0000 0000 b = 00 h read command byte (r/w): 0000 0100 b = 04 h the power-up default value is 00 h . the slot is disabled upon power-up, i.e., all supply outputs are off. in response to an overcurrent fault condition, writing a logical 1 back into the active (or set) bit position will clear the bit and de- assert /int. the status of the /faulta pin is not affected by reading the status register. status register, slot b (statb), 8-bits read only d[7] d[6] d[5] d[4] d[3] d[2] d[1] d[0] read-only read-only read-only read-write read-write read-write read-write read-write faulta maina vauxa vauxaf 12mvaf 12vaf 5vaf 3vaf bit(s) function operation faultb fault pin status, notes 1 & 2 slot b mainb main enable status, represents actual state slot b (on/off) of the four main power outputs for slot b (+12v, +5v, +3.3v and 12v) 1 = main power on 0 = main power off vauxb vaux enable status represents actual state slot b (on/off) of the auxiliary power outputs for slot b 1 = aux power on 0 = aux power off vauxfb overcurrent fault 1 = fault; 0 = no fault vaux supply 12mvfb overcurrent fault 1 = fault; 0 = no fault 12v supply 12vfb overcurrent fault 1 = fault; 0 = no fault +12v supply 5vfb overcurrent fault 1 = fault; 0 = no fault 5v supply 3vfb overcurrent fault 1 = fault; 0 = no fault 3.3v supply power-up default value: 0000 0000 b = 00 h read command byte (r/w): 0000 0101 b = 05 h the power-up default value is 00 h . the slot is disabled upon power-up, i.e., all supply outputs are off. in response to an overcurrent fault condition, writing a logical 1 back into the active (or set) bit position will clear the bit and de- assert /int. the status of the /faultb pin is not affected by reading the status register. note 1. 1 = /fault[a/b] pin asserted, indicating a fault condition (/fault is low). 0 = /fault[a/b] pin is de-asserted (/fault is high). if fault[a/b] has been set by an overcurrent condition on one (or more) of the main outputs, the corresponding on[a/b] must go low to reset fault. if fault[a/b] has been set by an overcurrent on a vaux output, the corresponding auxen[a/b] must go low to reset f ault. if an overcurrent has occurred on both a main output and vaux output of a slot, both on[a/b] and auxen[a/b] of the correspondin g slot must go low to reset fault. note 2. the fault bits, and the /fault pins, are not active when the MIC2590A power paths are controlled by the system management inter face (smbus). when using smi power path control for a slot, the auxen and on pins for that slot must be tied to ground.
march 2002 17 MIC2590A MIC2590A micrel common status register, (stat), 8-bits read/write d[7] d[6] d[5] d[4] d[3] d[2] d[1] d[0] read-only read-only read-only read-only read-write read-write read-write read-only reserved reserved gpib gpia intmsk uv_int ot_int reserved bit(s) function operation d[7] reserved always read as zero d[6] reserved always read as zero gpib general purpose input, state of gpib pin slot b gpia general purpose input, state of gpia pin slot a intmsk interrupt mask 0 = /int generation is enabled; 1 = /int generation is disabled. the MIC2590A does not participate in the smbus alert response address (ara) protocol. uv_int undervoltage set whenever a circuit interrupt breaker fault condition occurs as a result of an undervoltage lockout condition on one of the main supply inputs. this bit is only set if a uvlo condition occurs while one or both of the on[a/b] pins are asserted or the main[a/b] enable control bits are set. ot_int overtemperature set whenever a circuit interrupt breaker fault occurs as a result of an over- temperature condition exceeding 160 c shutting both channels off. d[0] reserved read undefined power-up default value: 0000 0000 b = 00 h command byte (r/w): 0000 0110 b = 06 h to reset the ot_int and uv_int fault bits a logical 1 must be written back to these bits.
MIC2590A micrel MIC2590A 18 march 2002 application information current sensing for the three power supplies switched with internal mosfets (+12v, 12v, and v aux ), the MIC2590A provides all neces- sary current sensing functions to protect the ic, the load, and the power supply. for the remaining four supplies which the part is designed to control, the high currents at which these supplies typically operate makes sensing the current inside the MIC2590A impractical. therefore, each of these supplies (3va, 5va, 3vb, and 5vb) requires an external current sensing resistor. the v in connection to the ic from each supply (e.g., 5vina) is connected to the positive terminal of the slot s current sense amplifier, and the corresponding sense input (in this case, 5vsensea) is connected to the negative terminal of the current sense amplifier. sense resistor selection the MIC2590A uses low-value sense resistors to measure the current flowing through the mosfet switches to the loads. these sense resistors are nominally valued at 50m ? /i load(cont) . to accommodate worst-case tolerances for both the sense resistor, (allow 3% over time and tem- perature for a resistor with 1% initial tolerance) and still supply the maximum required steady-state load current, a slightly more detailed calculation must be used. the current-limit threshold voltage (the trip point ) for the MIC2590A may be as low as 35mv, which would equate to a sense resistor value of 35m ? /i load(cont) . carrying the numbers through for the case where the value of the sense resistor is 3% high, this yields: r3 1.03 i 34m i sense load(cont) load(cont) =? () () = ? 5 once the value of r sense has been chosen in this manner, it is good practice to check the maximum i load(cont) which the circuit may let through in the case of tolerance build-up in the opposite direction. here, the worst-case maximum is found using a 65mv trip voltage and a sense resistor which is 3% low in value. the resulting current is: i 65mv (0.97)(r ) 67ma r load(cont.max) sense(nom) sense(nom) == as an example, if an output must carry a continuous 4.4a without nuisance trips occurring, r sense for that output should be 34m ? /4.4a = 7.73m ? . the nearest standard value is 7.5m ? , so a 7.5m ? 1% resistor would be a good choice. at the other set of tolerance extremes, i load(cont, max) for the output in question is then simply 67mv/7.5m ? = 8.93a. knowing this final datum, we can determine the necessary wattage of the sense resistor, using p = i 2 r. here i will be i load(cont, max) , and r will be (0.97)(r sense(nom) ). these numbers yield the following: p max = (8.93a) 2 (7.28m ? ) = 0.581w a 1.0w sense resistor would work well in this application. kelvin sensing because of the low values of the sense resistors, special care must be used to accurately measure the voltage drop across them. specifically, the voltage across each r sense must employ kelvin sensing. this is simply a means of making sure that any voltage drops in the power traces connecting to the resistors are not picked up in addition to the voltages across the sense resistors themselves. if accuracy must be paid for, it s worth keeping. figure 9 illustrates how kelvin sensing is performed. as can be seen, all the high current in the circuit (let us say, from +5vina through r sense and then to the drain of the +5va output mosfet) flows directly through the power pcb traces and r sense . the voltage drop resulting across r sense is sampled in such a way that the high currents through the power traces will not introduce any extraneous ir drops. r sense power trace from v cc power trace to mosfet drain signal trace to MIC2590A v cc signal trace to MIC2590A v sense figure 9. kelvin sensing connections for r sense mosfet selection selecting the proper mosfet for use as current pass and switching element for each of the 3v and 5v slots of the MIC2590A involves four straightforward tasks: 1. choice of a mosfet which meets the minimum voltage requirements. 2. determination of maximum permissible on-state resistance [r d-s(on) ]. 3. selection of a device to handle the maximum continu- ous current (steady-state thermal issues). 4. verification of the selected part s ability to withstand current peaks (transient thermal issues). mosfet voltage requirements the first voltage requirement for each mosfet is easily stated: the drain-source breakdown voltage of the mosfet must be greater than v in(max) for the slot in question. for instance, the 5v input may reasonably be expected to see high-frequency transients as high as 5.5v. therefore, the drain-source breakdown voltage of the mosfet must be at least 6v. the second breakdown voltage criteria which must be met is a bit subtler than simple drain-source breakdown voltage, but is not hard to meet. low-voltage mosfets generally have low breakdown voltage ratings from gate to source as well. in MIC2590A applications, the gates of the external mosfets are driven from the +12v input to the ic. that supply may well be at 12v + (5% x 12v) = 12.6v. at the same time, if the output of the mosfet (its source) is suddenly shorted to ground, the gate-source voltage will go to (12.6v 0v) = 12.6v. this
march 2002 19 MIC2590A MIC2590A micrel means that the external mosfets must be chosen to have a gate-source breakdown voltage in excess of 13v; after 12v absolute maximum the next commonly available voltage class has a permissible gate-source voltage of 20v maxi- mum. this is a very suitable class of device. at the present time, most power mosfets with a 20v gate-source voltage rating have a 30v drain-source breakdown rating or higher. as a general tip, look to surface-mount devices with a drain- source rating of 30v as a starting point. mosfet maximum on-state resistance the mosfets in the +3.3v and +5v main power paths will have a finite voltage drop, which must be taken into account during component selection. a suitable mosfet s data sheet will almost always give a value of on resistance for the mosfet at a gate-source voltage of 4.5v, and another value at a gate-source voltage of 10v. as a first approximation, add the two values together and divide by two to get the on resistance of the device with 7 volts of enhancement (keep this in mind; we ll use it in the following thermal issues sections). the resulting value is conservative, but close enough. call this value r on . since a heavily enhanced mosfet acts as an ohmic (resistive) device, almost all that is required to calculate the voltage drop across the mosfet is to multiply the maximum current times the mosfet s r on . the one addendum to this is that mosfets have a slight increase in r on with increasing die temperature. a good approximation for this value is 0.5% increase in r on per c rise in junction temperature above the point at which r on was initially specified by the manufacturer. for instance, the vishay (siliconix) si4430dy, which is a commonly used part in this type of application, has a specified r ds(on) of 8.0m ? max. at v g-s = 4.5v, and r ds(on) of 4.7m ? max. at v g-s = 10v. then r on is calculated as: r 4.7m 8.0m 2 6.35m on ?? ? + () = at 25 c t j . if the actual junction temperature is estimated to be 110 c, a reasonable approximation of r on for the si4430dy at temperature is: 6.35m 1 110 25 0.5% c 6.35m 1 85 0.5% c 9.05m ??? + () ? ? ? ? ? ? ? ? ? ? ? ? =+ () ? ? ? ? ? ? ? ? ? ? ? ? ? note that this is not a closed-form equation; if more precision were required, several iterations of the calculation might be necessary. this is demonstrated in the section mosfet transient thermal issues. for the given case, if si4430dy is operated at an i drain of 7.6a, the voltage drop across the part will be approximately (7.6a)(9.05m ? ) = 69mv. mosfet steady-state thermal issues the selection of a mosfet to meet the maximum continuous current is a fairly straightforward exercise. first, arm yourself with the following data: the value of i load(cont, max) for the output in question (see sense resistor selection). the manufacturer s data sheet for the candidate mosfet. the maximum ambient temperature in which the device will be required to operate. any knowledge you can get about the heat sinking available to the device (e.g., can heat be dissipated into the ground plane or power plane, if using a surface-mount part? is any airflow available?). now it gets easy: steady-state power dissipation is found by calculating i 2 r. as noted in mosfet maximum on-state resistance, above, the one further concern is the mosfet s increase in r on with increasing die temperature. again, use the si4430dy mosfet as an example, and assume that the actual junction temperature ends up at 110 c. then r on at temperature is again approximately 9.05m ? . again allow a maximum i drain of 7.6a: power dissipation i r 7.6a 9.05m 0.523w drain 2 on 2 ?= () ? ? the next step is to make sure that the heat sinking available to the mosfet is capable of dissipating at least as much power (rated in c/w) as that with which the mosfet s performance was specified by the manufacturer. formally put, the steady-state electrical model of power dissipated at the mosfet junction is analogous to a current source, and anything in the path of that power being dissipated as heat into the environment is analogous to a resistor. it s therefore necessary to verify that the thermal resistance from the junction to the ambient is equal to or lower than that value of thermal resistance (often referred to as r (ja) ) for which the operation of the part is guaranteed. as an applications issue, surface-mount mosfets are often less than ideally speci- fied in this regard it s become common practice simply to state that the thermal data for the part is specified under the conditions surface mounted on fr-4 board, t 10seconds, or something equally mystifying. so here are a few practical tips: 1. the heat from a surface-mount device such as an so-8 mosfet flows almost entirely out of the drain leads. if the drain leads can be sol- dered down to one square inch or more of copper the copper will act as the heat sink for the part. this copper must be on the same layer of the board as the mosfet drain. 2. since the rating for the part is given as for 10 seconds, derate the maximum junction tem- perature by 35 c. this is the standard good practice derating of 25 c, plus another 10 c to allow for the time element of the specification. 3. airflow, if available, works wonders. this is not the place for a dissertation on how to perform airflow calculations, but even a few lfm (linear feet per minute) of air will cool a mosfet down
MIC2590A micrel MIC2590A 20 march 2002 in terms related directly to the specification and use of power mosfets, this is known as transient thermal impedance. almost all power mosfet data sheets give a transient thermal impedance curve, which is a handy tool for making sure that you can safely get by with a less expensive mosfet than you thought you might need. for example, take the case where t flt for the 5v supply has been set to 50msec, i load(cont, max) is 5.0a, the slow-trip threshold is 50mv nominal, and the fast-trip threshold is 100mv. if the output is connected to a 0.60 ? load, the output current from the mosfet for the slot in question will be regulated to 5.0a for 50ms before the part s circuit breaker trips. during that time, the dissipation in the mosfet is given by: p = e ie mosfet = [5v 5a(0.6 ? )] = 2v p mosfet = (2v 5a) = 10w for 50msec. wow! looks like we need a really hefty mosfet to withstand just this unlikely but plausible enough to protect against fault condition. or do we? this is where the transient thermal impedance curves become very useful. figure 10 shows those curves for the vishay (siliconix) si4430dy, a com- monly used so-8 power mosfet: 10 ? 10 ? 1 10 600 10 ? 10 ? 100 2 1 0.1 0.01 0.2 0.1 0.05 0.02 single pulse duty cycle = 0.5 normalized thermal transient impedance, junction-to-ambient square wave pulse duration (sec) normalized effective transient thermal impedance 1. duty cycle, d = 2. per unit base = r thja = 67 c/w 3. t jm ?t a = p dm z thja (t) t 1 t 2 t 1 t 2 notes: 4. surface mounted p dm figure 10. si4430dy mosfet transient thermal impedance curve dramatically. if you can position the mosfet(s) in question near the inlet of a power supply s fan, or the outlet of a processor s cooling fan, that s always a good free ride. 4. although it seems a rather unsatisfactory statement, the best test of a surface-mount mosfet for an application (assuming the above tips show it to be a likely fit) is an empiri- cal one. the ideal evaluation is in the actual layout of the expected final circuit, at full operat- ing current. the use of a thermocouple on the drain leads, or in infrared pyrometer on the package, will then give a reasonable idea of the device s junction temperature. mosfet transient thermal issues having chosen a mosfet that will withstand the imposed voltage stresses, and be able to handle the worst-case continu- ous i 2 r power dissipation which it will see, it remains only to verify the mosfet s ability to handle short-term overload power dissipation without overheating. here, nature and phys- ics work in our favor: a mosfet can handle a much higher pulsed power without damage than its continuous dissipation ratings would imply. the reason for this is that, like everything else, semiconductor devices (silicon die, lead frames, etc.) have thermal inertia. this is easily understood by all of us who have stood waiting for a pot of water to boil. using this graph is not nearly as daunting as it may at first appear. taking the simplest case first, we ll assume that once a fault event such as the one in question occurs, it will be a long time, 10 minutes or more, before the fault is isolated and the slot is reset. in such a case, we can approximate this as a single pulse event, that is to say, there s no significant duty cycle. then, reading up from the x-axis at the point where square wave pulse duration is equal to 0.1sec (=100msec), we see that the effective thermal impedance of this mosfet to a single pulse event of this duration is only 6% of its continuous r (ja) . this particular part is specified as having an r (ja) of 50 c/w for intervals of 10 seconds or less. so, some further math, just to get things ready for the finale: assume t a = 55 c maximum, 1 square inch of copper at the drain leads, no airflow.
march 2002 21 MIC2590A MIC2590A micrel assume the mosfet has been carrying just about 5a for some time. then the starting (steady-state)t j is: t j ? 55 c + (7.3m ? )(5a) 2 (30 c/w) t j ? 60.5 c iterate the calculation once to see if this value is within a few percent of the expected final value. for this iteration we will start with t j equal to the already calculated value of 67 c: r on at t j = 60.5 c = [1+(60.5 c 25 )(0.5%/ c)] 6.35m ? r on at t j = 60.5 c ? 7.48m ? t j ? 55 c + (7.3m ? )(5a) 2 (30 c/w) t j ? 60.6 c at this point, the simplest thing to do is to approximate t j as 61 c, which will be close enough for all practical purposes. finally, add (10w)(67 c/w)(0.03) = 21 c to the steady-state t j to get t j(transient max) = 82 c. the si4430dy can easily handle this value of t j(max) . a second illustration of the use of the transient thermal imped- ance curves: assume that the system will attempt multiple retries on a slot showing a fault, with a one second interval between retry attempts. this frequency of restarts will signifi- cantly increase the dissipation in the si4430dy mosfet. will the mosfet be able to handle the increased dissipation? we get the following: the same part is operating into a persistent fault, so it is cycling in a square-wave fashion (no steady-state load) with a duty cycle of (50msec/second = 0.05). on the transient thermal impedance curves, read up from the x-axis to the line showing duty cycle equaling 0.05. the effective r (ja) = (0.7 x 67 c/w) = 4.7 c/w. calculating the peak junction temperature: t j(peak max) = [(10w)(4.7 c/w) + 55 c] = 102 c. and finally, checking the rms power dissipation just to be complete: p 5a 7.47m 0.05 0.042w rms 2 = ()( ) = ? which will result in a negligible temperature rise. the si4430dy is electrically and thermally suitable for this application. mosfet and sense resistor selection guide listed below, by manufacturer and type number, are some of the more popular mosfet and resistor types used in pci hot-plug applications. although far from comprehensive, this information will constitute a good starting point for most designs. power supply decoupling in general, prudent system design requires that power sup- plies used for logic functions should have less than 100mv of noise at frequencies of 100khz and above. this is especially true given the speeds of modern logic families, such as the 1.2 micron cmos used in the MIC2590A. the internal logic of the MIC2590A is powered from the 3.3v aux supply, and that supply should not carry hf noise in excess of 100mv peak-to-peak with respect to chip ground, especially at frequencies 1mhz. less obviously but equally importantly, the 12v supply should have less than 100mv of peak-to-peak noise at frequencies of 1mhz or higher. this is because the 12v supply is the most negative potential applied to the ic, and is therefore connected to the device s substrate. all of the subcircuits integrated onto the silicon chip are hence sub- jected by capacitive coupling to any hf noise on the 12v supply. while the individual capacitances are quite low, the amount of injected energy required to cause a glitch can also be quite low at the internal nodes of high speed logic circuits. if either the 3.3v aux source supply, the 12v source supply, or both supplies do carry significant hf noise (as can happen when they are locally derived by a switching converter), the solution is both small and inexpensive. a simple lc filter made of a ferrite bead between the noisy power supply input and the MIC2590A, followed by one 1 f and one 10nf ceramic capacitor from the MIC2590A input pin to ground will suffice for almost any situation. a suggested ferrite bead for mosfet vendors key mosfet type(s) web address vishay (siliconix) si4430dy ( littlefoot series) www.siliconix.com si4420dy ( littlefoot series) international rectifier irf7413a (so-8 package part) www.irf.com si4420dy (second source to vishay) fairchild semiconductor fds6644 (so-8 package part) www.fairchildsemi.com fds6670a (so-8 package part) fds6688 (so-8 package part) resistor vendors sense resistors web address vishay (dale) wsl series www.vishay.com/docs/wsl_30100.pdf irc oars series irctt.com/pdf_files/oars.pdf lr series irctt.com/pdf_files/lrc.pdf (second source to wsl )
MIC2590A micrel MIC2590A 22 march 2002 such use is fair-rite products corporation part # 2743019447 (this is a surface-mountable part). similar parts from other vendors will also work well, or a 0.27 h, air-core coil can be used. noisy v in to MIC2590A smt ferrite bead fair-rite products type 2743019447 1 f ceramic 1 f ceramic figure 11. filter circuit for noisy supplies (+3.3v and/or 12v) it is theoretically possible that high-amplitude, hf noise reflected back into one or both of the MIC2590A s 12v outputs could interfere with proper device operation, al- though such noisy loads are unlikely to occur in the real world. if this becomes an application-specific concern, a pair of filters similar to that in figure 11 will provide the required hf bypassing. the capacitors would be connected to the MIC2590A s 12v output pins, and the ferrite beads would be placed between the 12v output pins and the loads. 12v input clamp diode the 12v input to the MIC2590A is the most negative potential on the part, and is therefore connected to the chip s substrate (as described in power supply decoupling, above). although no particular sequencing of the 12v supply rela- tive to the other MIC2590A supplies is required for normal operation, this substrate connection does mean that the 12v input must never exceed the voltage on the ground pin of the ic by more than 0.3 volts. in some systems, even though the 12v supply will discharge towards ground poten- tial when it is turned off, the possibility exists that power supply output ringing or l(di/dt) effects in the wiring and on the pcb itself will cause brief transient voltages in excess of +0.3v to appear at the 12v input. the simplest way to deal with such a transient is to clamp it with a schottky diode. the diode s anode should be physically placed directly at the 12v input to the MIC2590A, and its cathode should have as short a path as possible back to the part s ground. a good smt part for this application is on semiconductor s type mbrs140t3 (1a, 40v). although the 40v rating of this part is a bit gratuitous, it is an inexpensive industry-standard part with many second sources. unless it is absolutely known in advance that the voltage on the 12v inputs will never exceed 0.0v at the ic s 12v input pins, it s wise to at least leave a position for this diode in the board layout and then remove it later. this final determination should be made by observations of the voltage at the 12v input with a fast storage oscilloscope, under turn-on and turn-off conditions. gate resistor guidelines the MIC2590A controls four external power mosfets, which handle the high currents for each of the two 3.3v and 5v outputs. a capacitor (c gate ) is connected in the applica- tion circuit from each gate pin of the MIC2590A to ground. each c gate controls the ramp-up rate of its respective power output (e.g., 5voutb). these capacitors, which are typically in the 10nf range, cause the gate outputs of the MIC2590A to have very low ac impedances to ground at any significant frequency. it is therefore necessary to place a modest value of gate damping resistance (r gate ) between each c gate and the gate of its associated mosfet. these resistances prevent high-frequency mosfet source-follower oscilla- tions from occurring. the exact value of the resistors used is not critical; 47 ? is usually a good choice. each r gate should be physically located directly adjacent to the mosfet gate lead to which it connects. MIC2590A gate r gate 47 ? c gate external mosfet figure 12. proper connection of c gate and r gate
march 2002 23 MIC2590A MIC2590A micrel package information 48-pin tqfp (btq)
MIC2590A micrel MIC2590A 24 march 2002 micrel inc. 1849 fortune drive san jose, ca 95131 usa tel + 1 (408) 944-0800 fax + 1 (408) 944-0970 web http://www.micrel.com this information is believed to be accurate and reliable, however no responsibility is assumed by micrel for its use nor for an y infringement of patents or other rights of third parties resulting from its use. no license is granted by implication or otherwise under any patent or pat ent right of micrel inc. ? 2002 micrel incorporated

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